I have a program that, in post-translate simulation (XST synthesis, ISE simulation, 10.1i) locks up in loading one of the input streams, but works OK in behavioral pre-synthesis simulation of the Impulse C HDL output. Any ideas? Attached is the screen shot from ISE, notice Memory collision errors reported at ~ 100 ns, and input stream hostcontrol locks up at ~ 200 ns. When working properly, as it does in pre-synthesis simulation, many more data points will be loaded into hostcontrol - it won't lock out hostcontrol_rdy.
Thank you.
David Watt
Full Version: Post-Translate Simulation, Memory Collision Error
QUOTE (davidwatt @ Oct 27 2008, 07:58 PM) 
I have a program that, in post-translate simulation (XST synthesis, ISE simulation, 10.1i) locks up in loading one of the input streams, but works OK in behavioral pre-synthesis simulation of the Impulse C HDL output. Any ideas? Attached is the screen shot from ISE, notice Memory collision errors reported at ~ 100 ns, and input stream hostcontrol locks up at ~ 200 ns. When working properly, as it does in pre-synthesis simulation, many more data points will be loaded into hostcontrol - it won't lock out hostcontrol_rdy.
Thank you.
David Watt
Thank you.
David Watt
Hi,
Your description and emailed screenshot are not enough to troubleshoot the issue. Please send your complete Impulse C project (.c,.h, .icProj) as well as HDL testbench files being used for review.
Best Regards,
Ed
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