I have read the impulse C tutorials, I sort of understand the information but I am having a bit of trouble figuring out how to actually program. I've used Verilog before, but I'm not that great at it.
So, as a simple test, I wanted to make a simple program in impulse C to run on my FPGA. Basically, I want to send it a black and white image and have the FPGA invert the image.
So I think the code is something like
CODE
#define PIPELINE_SIZE 16
void invert(co_stream image_in, co_stream image_out)
{
uint8 pixel[PIPELINE_SIZE];
uint8 cur_pixel;
int i;
do
{
co_stream_open(image_in, O_RDONLY, INT_TYPE(8));
co_stream_open(image_out, O_WRONLY, INT_TYPE(8));
for (i = 0; i < PIPELINE_SIZE; ++i)
{
#pragma CO UNROLL
co_stream_read(image_in, &cur_pixel, sizeof(uint8));
pixel[i] = 0xFF - cur_pixel;
}
for (i = 0; i < PIPELINE_SIZE; ++i)
{
#pragma CO UNROLL
co_stream_write(image_in, pixel[i], sizeof(uint8));
}
co_stream_close(image_in);
co_stream_close(image_out);
} while(1);
}
void invert(co_stream image_in, co_stream image_out)
{
uint8 pixel[PIPELINE_SIZE];
uint8 cur_pixel;
int i;
do
{
co_stream_open(image_in, O_RDONLY, INT_TYPE(8));
co_stream_open(image_out, O_WRONLY, INT_TYPE(8));
for (i = 0; i < PIPELINE_SIZE; ++i)
{
#pragma CO UNROLL
co_stream_read(image_in, &cur_pixel, sizeof(uint8));
pixel[i] = 0xFF - cur_pixel;
}
for (i = 0; i < PIPELINE_SIZE; ++i)
{
#pragma CO UNROLL
co_stream_write(image_in, pixel[i], sizeof(uint8));
}
co_stream_close(image_in);
co_stream_close(image_out);
} while(1);
}
But I'm not sure if this is correct or the best way to do it. I also don't know how to tell the function that the data is "done".
Also, how do I actually test this by sending data from my PC to the FPGA?
Thank you for your help!












