1 reply to this topic

[Jonathan]

First, I'm getting the following error when I try to generate HDL (though not when I run simulate in either CoDeveloper or Visual Studios):

Assertion failure in file "..\transform.cc" at line 684:
BATSFeedServiceFPGA_hw.c:273: Unexpected branch statement

The code in question, starting from line 273, is:

CODE

        switch ( operation ) {
            case L1BookHash_OP_READ:
                switch ( entry_found ) {
                    case 0:
                        // Now we wait on L2's progress to see if it exists there, and if so pull it up
                        // and insert it. For the moment though we're ignoring L2.
                        
                        // This means that the symbol/price combination is not listed in L1, L2, or external memory,
                        // and that the value is therefore 0. We generate a 0 because though this is technically the
                        // correct interpretation, we shouldn't be going to external memory when we don't expect
                        // anything to be there.
                        REG_WRITE( error, 1 );        // We signal an error, though it's not neccesarily an error since
                        REG_WRITE( amount_out, 0 );    // non-existence of an entry is equivelant to 0, but it could be...
                        break;
                    case 1:
                        REG_WRITE( amount_out, entryA.shares );
                        break;
                    case 2:
                        REG_WRITE( amount_out, entryB.shares );
                        break;
//                     case 3:
//                         REG_WRITE( amount_out, entryC.shares );
//                         break;
                }
                break;
        }

But that's not the weirdest part. When I uncomment out the case for value 3, I get the following error:

Assertion failure in file "..\transform.cc" at line 355:
BATSFeedServiceFPGA_hw.c:273: Fall-through case statements are not supportedmake: *** [BATSFeedServiceAccelerated.pk0] Error 1

As case 3 is identical to case 1 and 2, I don't understand what's going on here.


On a separate note, in a a completely different part of my code, I use a switch block in a macro to select from several options based on a constant value. I want to know if the Enable Constant Propagation optimization option will cause the switch statement to be evaluated at compile time... Also, in terms of optimization, how do if and switch statements compare? I got the impression from the Practical FPGA Programming in C book that switch statements are somehow better...

Thanks!
Jonathan

[RalphBodenner]

Hi Jonathan,

Did you try adding a default case to each switch block in the code sample above?

I'm not sure if constant propagation will collapse the switch to nothing when you switch on a constant value. You could try, and see how the generated HDL changes. This is like reading assembly code, but scarier Stage Master Explorer should also be able to show you, in a friendlier graphical way, what the resulting hardware blocks will look like.

Ralph