9 replies to this topic

[nelson]

hello ,
I want to use the FIR51 sample with fixed point values and coefficients . I have a Xilinx Spartan3e Starter board.

changing types :

CODE

//////////////////////////////////////////////////////////////////
// Fir filter example.
//
// Copyright© 2003-2005 Impulse Accelerated Technologies, Inc.
//
// fir_hw.c: includes the hardware process and configuration
// function.
//
// See additional comments in fir.h.
//

#include <stdio.h>
#include "co.h"
#include "cosim_log.h"
#include "fir.h"

extern void test_producer(co_stream waveform_raw);
extern void test_consumer(co_stream waveform_filtered);


void fir(co_stream filter_in, co_stream filter_out)
{
co_uint32 coef[TAPS];
IF_SIM(int samplesread = 0;)
IF_SIM(int sampleswritten = 0;)
co_uint32 firbuffer[TAPS];
co_uint32 nSample;
co_uint32 nFiltered;
co_uint32 accum;
int tap;

IF_SIM( cosim_logwindow log; )
IF_SIM ( log = cosim_logwindow_create("fir"); )

do { // Hardware processes run forever

co_stream_open(filter_in, O_RDONLY, UINT_TYPE(32));
co_stream_open(filter_out, O_WRONLY, UINT_TYPE(32));

// First fill the coef array with the coefficients...
for (tap = 0; tap < TAPS; tap++) {
#pragma CO UNROLL
co_stream_read(filter_in, &nSample, sizeof(co_uint32));
coef[tap] = nSample;
}

// Now fill the firbuffer array with the first n values...
for (tap = 1; tap < TAPS; tap++) {
#pragma CO UNROLL
co_stream_read(filter_in, &nSample, sizeof(co_uint32));
IF_SIM(samplesread++
firbuffer[tap-1] = nSample;
}

// Now we have an almost full buffer and can start processing
// the streaming waveform samples.
//

// Read values from the stream
while ( co_stream_read(filter_in, &nSample, sizeof(co_uint32)) == co_err_none ) {
#pragma CO PIPELINE
IF_SIM(samplesread++
firbuffer[TAPS-1] = nSample;

accum = 0x00000000;
for (tap = 0; tap < TAPS; tap++) {
#pragma CO UNROLL
#pragma CO SET StageDelay 100


accum += FXMUL32(firbuffer[tap],coef[tap],8);
}
nFiltered = accum >> 2;

co_stream_write(filter_out, &nFiltered, sizeof(co_uint32));

IF_SIM(sampleswritten++

for (tap = 1; tap < TAPS; tap++) {
#pragma CO UNROLL
firbuffer[tap-1] = firbuffer[tap];
}
}
IF_SIM(cosim_logwindow_fwrite(log,
"Closing fir filter process, samples read: %d, samples written: %d\n",
samplesread, sampleswritten)

co_stream_close(filter_in);
co_stream_close(filter_out);

IF_SIM(break;) // Only run once for desktop simulation

} while(1);
}

//
// Impulse C configuration function
//
void config_fir(void *arg)
{
co_stream waveform_raw;
co_stream waveform_filtered;

co_process fir_process;
#ifdef IMPULSE_C_SYNTHESIS
co_port fir_input, fir_output;
#else
co_process producer_process;
co_process consumer_process;
cosim_logwindow_init();
#endif

waveform_raw = co_stream_create("waveform_raw", UINT_TYPE(32), BUFSIZE);
waveform_filtered = co_stream_create("waveform_filtered", UINT_TYPE(32), BUFSIZE);

fir_process = co_process_create("filter_process", (co_function)fir,
2,
waveform_raw,
waveform_filtered);

#ifdef IMPULSE_C_SYNTHESIS
// Assign the stream I/O to specific named ports...
fir_input = co_port_create("FIR_input", co_input, waveform_raw);
fir_output = co_port_create("FIR_output", co_output, waveform_filtered);
#else
producer_process = co_process_create("producer_process", (co_function)test_producer,
1,
waveform_raw);

consumer_process = co_process_create("consumer_process",(co_function)test_consumer,
1,
waveform_filtered);
#endif
// Assign processes to hardware elements
co_process_config(fir_process, co_loc, "PE0");
}

co_architecture co_initialize(int param)
{
return(co_architecture_create("fir_arch","Generic_VHDL",config_fir,(void *)param));
}

CODE

//////////////////////////////////////////////////////////////////
// Fir filter example.
//
// Written for Generic Platform Support Package.
//
// Copyright© 2003-2005 Impulse Accelerated Technologies, Inc.
//
// fir_sw.c: includes the software test bench processes and
// main() function.
//
#ifdef WIN32
#include <windows.h>
#include <sys/types.h>
#include <sys/stat.h>
#else // ! WIN32
#include <sys/stat.h>
#include <unistd.h>
#include <stdlib.h>
#endif
#include <stdio.h>
#include "co.h"
#include "co_math.h"
#include "cosim_log.h"
#include "fir.h"
#define HARDWARE_FIXED

extern co_architecture co_initialize(void *);

void test_producer(co_stream waveform_raw)
{
int c;
cosim_logwindow log = cosim_logwindow_create("test_producer");

// Read waveform and coefficients from a file
const char * CoefFileName = COEF_FILE; // See fir.h
FILE * coefFile;
const char * FileName = INPUT_FILE; // See fir.h
FILE * inFile;
co_uint32 coefValue;
co_uint32 waveformValue;
int coefcount = 0;

coefFile = fopen(CoefFileName, "r");
if ( coefFile == NULL ) {
fprintf(stderr, "Error opening coefficients file %s\n", CoefFileName);
c = getc(stdin);
exit(-1);
}

// Read and write the coefficient data...
co_stream_open(waveform_raw, O_WRONLY, UINT_TYPE(32));
cosim_logwindow_write(log, "Sending coefficients...\n");
while (coefcount < TAPS) {
if (fscanf(coefFile,"%d",&coefValue) < 1)
{
break;
}
coefcount++;
co_stream_write(waveform_raw, &coefValue, sizeof(co_uint32));
cosim_logwindow_fwrite(log, "Coefficient: %x\n", coefValue);
}
cosim_logwindow_fwrite(log, "Finished writing %d coefficients.\n", coefcount);
fclose(coefFile);

inFile = fopen(FileName, "r");
if ( inFile == NULL ) {
fprintf(stderr, "Error opening waveform file %s\n", FileName);
c = getc(stdin);
exit(-1);
}

// Now read and write the waveform data...
co_stream_open(waveform_raw, O_WRONLY, UINT_TYPE(32));
cosim_logwindow_write(log, "Sending waveform...\n");
while (1) {
if (fscanf(inFile,"%d",&waveformValue) < 1)
{
break;
}
co_stream_write(waveform_raw, &waveformValue, sizeof(co_uint32));
cosim_logwindow_fwrite(log, "Value: %x\n", waveformValue);
}
cosim_logwindow_write(log, "Finished writing waveform.\n");
co_stream_close(waveform_raw);
fclose(inFile);
}

void test_consumer(co_stream waveform_filtered)
{
co_uint32 waveformValue;
unsigned int waveformCount = 0;
const char * FileName = OUTPUT_FILE; // See fir.h
FILE * outFile;

cosim_logwindow log = cosim_logwindow_create("test_consumer");

outFile = fopen(FileName, "w");
if ( outFile == NULL ) {
fprintf(stderr, "Error opening waveform file %s for writing\n", FileName);
exit(-1);
}

co_stream_open(waveform_filtered, O_RDONLY, UINT_TYPE(32));

cosim_logwindow_write(log, "Consumer reading data...\n");
while ( co_stream_read(waveform_filtered, &waveformValue, sizeof(co_uint32)) == co_err_none ) {
fprintf(outFile, "%d\n", waveformValue);
cosim_logwindow_fwrite(log, "Value: %x\n", waveformValue);
printf("Filtered value: %x\n", waveformValue);
waveformCount++;
}
cosim_logwindow_fwrite(log, "Consumer read %d waveform datapoints...\n", waveformCount);
co_stream_close(waveform_filtered);
fclose(outFile);
}

int main(int argc, char *argv[])
{
co_architecture my_arch;
void *param = NULL;
int c;

printf("Impulse C is Copyright 2003 Impulse Accelerated Technologies, Inc.\n");

my_arch = co_initialize(param);
co_execute(my_arch);

printf("\n\nApplication complete. Press the Enter key to continue.\n");
c = getc(stdin);

return(0);
}

is this correct?

i have modified coefficients.dat with values like 0x000000ff, I only get the first '0'

thanks

[RalphBodenner]

The call to fscanf in Producer is reading the leading '0' from your first hex number, then failing on the next call. You want to either convert to decimal numbers in the input file or use the format string "%x" instead of "%d".

Regards,
Ralph

[nelson]

it works thanks ,

I put all the coefficients values into an array in hw file and remove the coef reading from sw, in order to not use the coeff.dat file


I want to insert de data values from a board port... which one should i use¿ (xilinx spartan 3e) how can i do this¿ is necessary to implement a microblaze¿

[RalphBodenner]

I would suggest the XUPV2P, since it has stereo audio connectors, whereas the Spartan board doesn't.

[nelson]

ok, now I have the XUPV2P
what's the next step¿

thanks

[RalphBodenner]

Hi Nelson,

It will be a matter of doing some HDL coding and work with the Xilinx tools to get audio input on an Impulse C stream. Xilinx may have some IP cores you can use to get audio input from the connectors to the FPGA, or an HDL reference design that uses them. Once you have audio data coming into the FPGA, you can write a little HDL to connect an Impulse C stream (exposed on the top-level Impulse module in *_top.vhd) to whatever interface the audio IP or ref. design gives you.

Regards,
Ralph

[nelson]

hello,

in the complexfir (microblaze) example, if I change the coef and values to fixed point from ComplexFilter.c; could I use the macro FXMUL in Filter_sw to multiply and change data types to co_int8/16/32 ?¿¿ i'm not using complex values, I'm only using the "real" variable to operate.
xilinx Edk gives me warnings about it on filter_sw .



complexfilter.c Mod

CODE

#include "Filter.h"

void InitInputData (co_int32 *in_data, short in_data_len) {
co_int32 *t_data_ptr;
int i;
co_int32 val[961]={0x01400000 , /* REMOVED FOR BREVITY */};

t_data_ptr = in_data;

for (i = 0; i < in_data_len; i++) {
*t_data_ptr = val[i];
t_data_ptr++;
}
}

void InitIFFiltCoef (co_int32 *filt_coef, short filt_len) {
co_int32 *t_filt_ptr;
int i;
co_int32 coef[10]={0x00021216 , 0x0004dbd2, 0x000beb8d, 0x0013f3fd, 0x0019328d,
0x0019328d, 0x0013f3fd, 0x000beb8d ,0x0004dbd2 ,0x00021216};
t_filt_ptr = filt_coef;

for (i = 0; i < filt_len; i++) {

*t_filt_ptr = coef[i];
t_filt_ptr++;
}
}

Filter_Hw

CODE

#include <stdio.h>
#include "co.h"
#include "cosim_log.h"
#include "Filter.h"
#include "co_math.h"

extern void call_accelerator (co_stream output_stream, co_stream input_stream);

void complex_fir (co_stream filter_in, co_stream filter_out) {
co_int32 coef_mem[IF_FILT_LEN];
co_int32 filt_hist[IF_FILT_LEN];
co_int32 inSample;
co_int32 outFilter;
int i;
int write_idx;
int read_idx;
int t_read_idx, t_read_idx2;
co_int32 t_coef, t_hist;
co_int32 coef_real;
co_int32 hist_real;
co_int32 p1_real;
co_int32 accum_real;
IF_SIM (int samplesread = 0;)
IF_SIM (int sampleswritten = 0;)

IF_SIM ( cosim_logwindow log; )
IF_SIM ( log = cosim_logwindow_create ("complex_fir"); )

co_array_config(coef_mem,co_kind,"async");
co_array_config(filt_hist,co_kind,"async");

do { // Hardware processes run forever

co_stream_open (filter_in, O_RDONLY, INT_TYPE(32));
co_stream_open (filter_out, O_WRONLY, INT_TYPE(32));

// Init history pointers
write_idx = IF_FILT_LEN - 1;
read_idx = 0;

i = 0;
do {
#pragma CO PIPELINE
// Fill the Coefficient Memory
co_stream_read (filter_in, &inSample, sizeof(co_int32));
coef_mem[i] = inSample;
// Clear the filter history
filt_hist[i++] = 0;
} while(i < IF_FILT_LEN);

// Begin to process incoming data
while (co_stream_read (filter_in, &inSample, sizeof(co_int32)) == co_err_none) {
IF_SIM (samplesread++

filt_hist[write_idx] = inSample;
if (write_idx == (IF_FILT_LEN - 1))
write_idx = 0;
else
write_idx++;

t_read_idx = read_idx++;
if (read_idx >= IF_FILT_LEN )
read_idx = 0;

//
// Create Filtered value
//

// Clear the accums
accum_real = 0;

for (i = 0;i < IF_FILT_LEN;i++){
#pragma CO PIPELINE
#pragma CO set stageDelay 32
// Get the pieces
t_coef = coef_mem[i];
t_hist = filt_hist[t_read_idx++];

if (t_read_idx >= IF_FILT_LEN )
t_read_idx = 0;

coef_real = t_coef;
hist_real = t_hist;

// Create the products
p1_real=FXMUL32(coef_real,hist_real,23);
//p1_real = coef_real * hist_real;


// Accumulate products

accum_real += p1_real;

//IF_SIM(cosim_logwindow_fwrite(log,
// "RESUL : %x, COEF: %x\n",
// accum_real, t_coef)


}



// Transfer result to output word
outFilter = accum_real ;

// Output Filtered value
co_stream_write (filter_out, &outFilter, sizeof(co_int32));
IF_SIM(sampleswritten++
}
IF_SIM (cosim_logwindow_fwrite (log,
"Closing Complex FIR, samples read : %d, samples written : %d\n",
samplesread, sampleswritten)

co_stream_close (filter_in);
co_stream_close (filter_out);

IF_SIM(break;)
} while (1);
}

void config_filt (void *arg) {
int i;

co_stream to_filt, from_filt;
co_process cpu_proc, filter_proc;

to_filt = co_stream_create ("to_filt", INT_TYPE(32), 4);
from_filt = co_stream_create ("from_filt", INT_TYPE(32), 4);

cpu_proc = co_process_create ("cpu_proc", (co_function) call_accelerator, 2, to_filt, from_filt);
filter_proc = co_process_create ("filter_proc", (co_function) complex_fir, 2, to_filt, from_filt);

co_process_config (filter_proc, co_loc, "PE0");
}

co_architecture co_initialize () {
return (co_architecture_create ("filt", "xilinx_fsl", config_filt, NULL));
}

Filter_sw

CODE

#include <stdio.h>
#include "co.h"
#include "ComplexFilter.h"
#include "Filter.h"
#include "co_math.h"

#if defined(IMPULSE_C_TARGET)
#include "xparameters.h"
#else
#include "cosim_log.h"
#endif

#if defined(XPAR_MICROBLAZE_ID)
#include "mb_interface.h"
#include "xbasic_types.h"
#include "xutil.h"
#include "xtmrctr.h"
#define printf xil_printf
#define TIMER_FREQ_MILLI (XPAR_CPU_CORE_CLOCK_FREQ_HZ/1000)
#define INIT_TIMER() \
XTmrCtr_Initialize(&TimerCounter, XPAR_MYTIMER_DEVICE_ID);\
XTmrCtr_SetResetValue(&TimerCounter,0,0);\
XTmrCtr_Start(&TimerCounter,0)
#define START_TIMER(var) XTmrCtr_Reset(&TimerCounter,0)
#define END_TIMER(var) var=XTmrCtr_GetValue(&TimerCounter,0)
#define TIMER_UNITS "cycles"
XTmrCtr TimerInst;
Xuint32 StartIF_TS;
Xuint32 FinishIF_TS;
Xuint32 t_Time1, t_Time2;
Xuint32 TimeSA, TimeHA;
XStatus status;
#endif

int k;
// Mass Storage
co_int32 input_data[NUM_SAMPS_IN_SLOT];
co_int32 if_filter_coef[IF_FILT_LEN];
co_int32 if_filter_output[NUM_SAMPS_IN_SLOT];

// Software ComplexFIR running in MicroBlaze...
void software_fir(void) {
co_int32 coef_mem[IF_FILT_LEN];
co_int32 filt_hist[IF_FILT_LEN];
co_int32 inSample;
co_int32 outFilter;
int32 i, jj, ii;
int32 write_idx;
int32 read_idx;
int32 t_read_idx, t_read_idx2;
co_int32 t_coef, t_hist;
co_int32 coef_real;
co_int32 hist_real;
co_int32 p1_real;
co_int32 accum_real;

#if defined(XPAR_MICROBLAZE_ID)
printf ("\r\n===================Running the Software-Only Version================\r\n");
printf ("--> Begin filtering two slots\r\n");
StartIF_TS = XTmrCtr_GetValue (&TimerInst, 0);
#else
printf ("Begin Filtering a Slot\r\n");
#endif

for (i=0;i<IF_FILT_LEN;i++) {
// Fill the Coefficient Memory
coef_mem[i] = if_filter_coef[i];
// printf("...coeffients No. %d from sw: %08X\r\n", i, if_filter_coef[i]);
// Clear the filter history
filt_hist[i] = 0;
}

// Run NUM_SLOTS slots
for (ii=0;ii < NUM_SLOTS;ii++){
// Init history pointers
write_idx = IF_FILT_LEN - 1;
read_idx = 0;

// Begin to process incoming data
for (jj=0;jj<NUM_SAMPS_IN_SLOT;jj++){
#if defined(XPAR_MICROBLAZE_ID)
if ((jj & 0xFFFFFF80) == jj) printf("*");
#endif
filt_hist[write_idx] = input_data[jj];
// printf("......input data from sw: %08X\r\n", input_data[jj]);
if (write_idx == (IF_FILT_LEN - 1))
write_idx = 0;
else
write_idx++;

t_read_idx = read_idx++;
if (read_idx >= IF_FILT_LEN )
read_idx = 0;

//
// Create Filtered value
//

// Clear the accums
accum_real = 0;


i=0;
do {
// Get the pieces
t_coef = coef_mem[i++];
t_hist = filt_hist[t_read_idx++];

if (t_read_idx >= IF_FILT_LEN )
t_read_idx = 0;

coef_real = t_coef;
hist_real = t_hist;

// Create the products
p1_real=FXMUL32(coef_real,hist_real,23);
//p1_real = coef_real * hist_real;


// Accumulate products
accum_real += p1_real;

} while (i<IF_FILT_LEN);

// Transfer result to output word
outFilter = accum_real;

// Output Filtered value
if_filter_output[jj] = outFilter;
// printf("............output value from sw: %08X\r\n", outFilter);
}
}

// Get FinishIF Timestamp
#if defined(XPAR_MICROBLAZE_ID)
FinishIF_TS = XTmrCtr_GetValue (&TimerInst, 0);
printf ("\r\n--> Done filtering two slots");

// Print Accumulated Stats
TimeSA = (FinishIF_TS - StartIF_TS)/TIMER_FREQ_MILLI;

printf (", execution time : %d milliseconds\r\n", TimeSA);

#else
printf ("Complete Filtering a Slot\r\n");
#endif
}

// Impulse declarations
extern co_architecture co_initialize(void *);

int main(void)
{
int c;
co_architecture my_arch;

IF_SIM ( cosim_logwindow swlog; )
IF_SIM ( swlog = cosim_logwindow_create ("complex_fir"); )
IF_SIM (cosim_logwindow_fwrite (swlog,
"Begin Simulation\n")

// Initialize input data array
InitInputData ( &input_data[0], (short) NUM_SAMPS_IN_SLOT);

// Initialize IF Filter Coefficients
InitIFFiltCoef ( &if_filter_coef[0], (short) IF_FILT_LEN);

#if defined(XPAR_MICROBLAZE_ID)
// Enable ICache
microblaze_init_icache_range(0, XPAR_MICROBLAZE_0_CACHE_BYTE_SIZE);
microblaze_enable_icache();

// Enable DCache
microblaze_init_dcache_range(0, XPAR_MICROBLAZE_0_DCACHE_BYTE_SIZE);
microblaze_enable_dcache();

printf("\r\n\n\n\n");
printf(" ____ __ ______\r\n");
printf(" / _/___ ___ ____ __ __/ /_______ / ____/ C-toFPGA Tools\r\n");
printf(" / // __ `__ \\/ __ \\/ / / / / ___/ _ \\ / / for Xilinx FPGA\r\n");
printf(" _/ // / / / / / /_/ / /_/ / (__ ) __/ / /___ Platforms\r\n");
printf("/___/_/ /_/ /_/ .___/\\__,_/_/____/\\___/ \\____/\r\n");
printf(" /_/\r\n");
printf("--------------------------------------------------------------------\r\n");
printf("Complex FIR Filter Acceleration demonstration, featuring the Xilinx\r\n");
printf("MicroBlaze, Virtex-5 FPGA and Impulse C-to-FPGA tools.\r\n");

// Initialize Timer
status = XTmrCtr_Initialize (&TimerInst, XPAR_XPS_TIMER_0_DEVICE_ID);
if (status != XST_SUCCESS)
printf ("ERROR Initializing Timer, returned code : %d\r\n", status);
XTmrCtr_Start (&TimerInst, 0);
t_Time1 = XTmrCtr_GetValue (&TimerInst, 0);
t_Time2 = XTmrCtr_GetValue (&TimerInst, 0);
#endif

// Running on software
software_fir();

// Running on hardware
my_arch = co_initialize (NULL);
co_execute (my_arch);


#if defined(XPAR_MICROBLAZE_ID)

// Print Acceleration Numbers

printf ("\r\n--> Acceleration factor: %dX\r\n\n", TimeSA/TimeHA);
#endif


#if defined(XPAR_MICROBLAZE_ID)
printf ("------> Visit www.ImpulseC.com to learn more!");

// Disable DCache
microblaze_disable_dcache();
microblaze_init_dcache_range(0, XPAR_MICROBLAZE_0_DCACHE_BYTE_SIZE);

// Disable ICache
microblaze_disable_icache();
microblaze_init_icache_range(0, XPAR_MICROBLAZE_0_CACHE_BYTE_SIZE);

return 0;
#else
printf ("COMPLETE APPLICATION\r\n");
printf ("Press Enter to continue...\r\n");
c = getc(stdin);
#endif
}

void call_accelerator (co_stream output_stream, co_stream input_stream) {
int i, j;
co_int32 inSampVal;
co_int32 outSampVal;
co_int32 err;
register co_int32 *t_data_in_ptr;
register co_int32 *t_data_out_ptr;

co_stream_open (output_stream, O_WRONLY, INT_TYPE(32));
co_stream_open (input_stream, O_RDONLY, INT_TYPE(32));

// Load Filter Coefs into Accelerator
t_data_in_ptr = if_filter_coef;
for (i = 0; i < IF_FILT_LEN; i++) {
inSampVal = *t_data_in_ptr;
t_data_in_ptr++;
// Write to Coef Mem
HW_STREAM_WRITE (cpu_proc, output_stream, inSampVal);
// printf("...coeffients No. %d from sw: %08X\r\n", i, inSampVal);
}

// Get StartIF Timestamp
#if defined(XPAR_MICROBLAZE_ID)
printf ("\r\n===================Running the Accelerated Version==================\r\n");
printf ("--> Begin filtering two slots\r\n");
StartIF_TS = XTmrCtr_GetValue (&TimerInst, 0);
#else
printf ("Begin Filtering a Slot\r\n");
#endif

// Run NUM_SLOTS slots
for (i = 0; i < NUM_SLOTS; i++) {
// Run IF Filter on 1 slot
t_data_in_ptr = input_data;
t_data_out_ptr = if_filter_output;
// Send in 1st sample & start processing
// Grab Sample from input array
inSampVal = *t_data_in_ptr;
t_data_in_ptr++;
// Write to Accelerator
HW_STREAM_WRITE (cpu_proc, output_stream, inSampVal);
// printf("......input data from sw: %08X\r\n", inSampVal);
for (j = 0; j < NUM_SAMPS_IN_SLOT - 1; j++) {
// Grab Sample from input array
inSampVal = *t_data_in_ptr;
t_data_in_ptr++;
// Read result
HW_STREAM_READ (cpu_proc, input_stream, outSampVal, err);
// printf("................output value from hw: %08X\r\n", outSampVal);
// Write Filter output to array
*t_data_out_ptr = outSampVal;
t_data_out_ptr++;
// Write to Accelerator
HW_STREAM_WRITE (cpu_proc, output_stream, inSampVal);
// printf("......input data from sw: %08X\r\n", inSampVal);
}
// Read last result
HW_STREAM_READ (cpu_proc, input_stream, outSampVal, err);
// printf("................output value from hw: %08X\r\n", outSampVal);
// Write Filter output to array
*t_data_out_ptr = outSampVal;
}
// Get FinishIF Timestamp
#if defined(XPAR_MICROBLAZE_ID)
FinishIF_TS = XTmrCtr_GetValue (&TimerInst, 0);
printf("**********************************************");

printf ("\r\n--> Done filtering two slots");

// Print Accumulated Stats
TimeHA = (FinishIF_TS - StartIF_TS)/TIMER_FREQ_MILLI;
printf (", execution time : %d milliseconds\r\n", TimeHA);
#else
printf ("Complete Filtering a Slot\r\n");
#endif

HW_STREAM_CLOSE (cpu_proc, output_stream);
HW_STREAM_CLOSE (cpu_proc, input_stream);
}

regards

[RalphBodenner]

Hi Nelson,

What are the warning messages EDK gives you?

Ralph

[nelson]

Hello Ralph,

I'm following the 'Tutorial 2: Complex FIR on EDK 10.1i' with Xilinx ISE 11 for an Spartan 3E starter board.

I used these clocks:






reports:

After 'Generate Bitstream '
Console:

CODE

Running DRC.
WARNING:PhysDesignRules:372 - Gated clock. Clock net
DDR_SDRAM/DDR_SDRAM/mpmc_core_0/gen_s3_ddr_phy.mpmc_phy_if_0/data_path/dqs_de
layed_col1<0> is sourced by a combinatorial pin. This is not good design
practice. Use the CE pin to control the loading of data into the flip-flop.
WARNING:PhysDesignRules:372 - Gated clock. Clock net
DDR_SDRAM/DDR_SDRAM/mpmc_core_0/gen_s3_ddr_phy.mpmc_phy_if_0/data_path/dqs_de
layed_col0<1> is sourced by a combinatorial pin. This is not good design
practice. Use the CE pin to control the loading of data into the flip-flop.
WARNING:PhysDesignRules:372 - Gated clock. Clock net
DDR_SDRAM/DDR_SDRAM/mpmc_core_0/gen_s3_ddr_phy.mpmc_phy_if_0/data_path/dqs_de
layed_col1<1> is sourced by a combinatorial pin. This is not good design
practice. Use the CE pin to control the loading of data into the flip-flop.
WARNING:PhysDesignRules:372 - Gated clock. Clock net
DDR_SDRAM/DDR_SDRAM/mpmc_core_0/gen_s3_ddr_phy.mpmc_phy_if_0/data_path/dqs_de
layed_col0<0> is sourced by a combinatorial pin. This is not good design
practice. Use the CE pin to control the loading of data into the flip-flop.
WARNING:PhysDesignRules:367 - The signal <dlmb_LMB_ABus<31>> is incomplete. The
signal does not drive any load pins in the design.
WARNING:PhysDesignRules:367 - The signal <dlmb_LMB_ABus<30>> is incomplete. The
signal does not drive any load pins in the design.
WARNING:PhysDesignRules:1060 - Dangling pins on
block:<DDR_SDRAM/DDR_SDRAM/mpmc_core_0/mpmc_data_path_0/gen_write_fifos[1].ge
n_fifos.mpmc_write_fifo_0/gen_fifo_bram.mpmc_bram_fifo_0/gen_brams_normal.gen
_normal.gen_brams[0].bram/gen_ramb16_s36_s36.bram.A>:<RAMB16_RAMB16A>. The
block is configured to use input parity pins. There are dangling output
parity pins.
DRC detected 0 errors and 7 warnings. Please see the previously displayed
individual error or warning messages for more details.
Creating bit map...
Saving bit stream in "system.bit".
Bitstream generation is complete.
Done!

After "Build user application"
Warning:

CODE

co_type.c: In function 'co_type_create':
co_type.c:15: warning: incompatible implicit declaration of built-in function 'malloc'

Warning Userapp adding sources
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c: In function 'main':
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:176: warning: 'microblaze_init_icache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:58)
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:180: warning: 'microblaze_init_dcache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:60)
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:224: warning: 'microblaze_init_dcache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:60)
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:228: warning: 'microblaze_init_icache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:58)

After 'user application adding sources'
Console:

CODE

/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c: In function 'main':
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:176: warning: 'microblaze_init_icache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:58)
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:180: warning: 'microblaze_init_dcache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:60)
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:224: warning: 'microblaze_init_dcache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:60)
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:228: warning: 'microblaze_init_icache_range' is deprecated (declared at ./microblaze_0/include/mb_interface.h:58)
/cygdrive/c/DOCUME~1/beak/CONFIG~1/Temp/cciA15nE.o: In function `software_fir':
/cygdrive/c/Impulse/CoDeveloper3/Examples/Embedded/ComplexFIR_MicroBlaze/EDK/code/Filter_sw.c:153: undefined reference to `FXMUL32'
collect2: ld returned 1 exit status
make: *** [AccFir/executable.elf] Error 1
Done!

Thanks

[RalphBodenner]

Hi Nelson,

The FXMUL32 macro normally requires a 64-bit intermediate result, and is defined for PLB-based platforms, but not FSL-based platforms. We're investigating the best solution, but a quick workaround would be to try copying the macro definition from %IMPULSEC_HOME%/Include/co_math.h into Filter_sw.c.

Regards,
Ralph