hi,
i just ask if there is any helpful information about pipe lining hardware process, i followed the project wizrad and made some modification but there's always something not clear.
Information like how to be sure that process are communicating between them, and the creation is ok ?
How can i know the data transferred in the intermediate streams?
The block diagram generated with app monitor seems ok but still i m not convicted.
thanks a lot.
Informations about pipelining hardware process
Started by bizertino, May 08 2009 03:42 AM
1 reply to this topic
#1
Posted 08 May 2009 - 03:42 AM
#2
Posted 08 May 2009 - 07:07 AM
To be sure that the data is being transferred correctly, you could run the desktop simulation, either in a debugger like Visual Studio's or using "printf" to print values to the console.
The hardware compiler does stricter checking of connections than the desktop simulation compile, so you could run HDL generation to verify all the streams are connected.
Regards,
Ralph
The hardware compiler does stricter checking of connections than the desktop simulation compile, so you could run HDL generation to verify all the streams are connected.
Regards,
Ralph
Ralph Bodenner
Impulse Accelerated Technologies, Inc.
Impulse Accelerated Technologies, Inc.
1 user(s) are reading this topic
0 members, 1 guests, 0 anonymous users












