I'm trying to interface my external hardware outside the fpga with the module i'm developping in impulse C. I need to connect specific signals to specific pins.
I learned through this website that it's done by using ports. I have the book the i can't find anything about using co_port in it?? Is this right or have i just missed it? When i missed it can you gave me a page number.
Thanx
RVDV
0
co_port ??
Started by RvDv, Feb 10 2006 06:35 AM
2 replies to this topic
#2
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Posted 10 February 2006 - 11:46 AM
There are no discussions of co_port in the book, as this Impulse C feature was added after the book was released. There are examples and information in the CoDeveloper help files, and in some of the examples such as Fir51.
The purpose of co_port is:
1. co_port allows you to override the automatically-generated names for signals, streams, etc. This is particularly useful if you need to connect signals generated by our compiler to external signals, pins, etc.
2. co_port allows you to suppress the generation of bus interfaces (using an option in the Generation Options dialog). This is important if you want some parts of your application to be connected to a bus (such as Altera FSL or APU, or Altera Avalon) and other parts to be left "dangling" for use as external interfaces.
3. co_port eliminates compile errors that you will see if you leave streams, signals, etc. unconnected. For example, most (all?) of our examples have software test benches with producer/consumer processes. If you want to simply write a single process and generate hardware for it, the compiler will generate errors unless you terminate the streams, signals, etc. using co_port.
I hope this helps. By the way, we have had requests for more co_port related features allowing easier interface using Xilinx EDK (Platform Studio) and Altera SOPC Builder, and we are investigating possible enhancements in that area. User feedback is always welcome.
David Pellerin
The purpose of co_port is:
1. co_port allows you to override the automatically-generated names for signals, streams, etc. This is particularly useful if you need to connect signals generated by our compiler to external signals, pins, etc.
2. co_port allows you to suppress the generation of bus interfaces (using an option in the Generation Options dialog). This is important if you want some parts of your application to be connected to a bus (such as Altera FSL or APU, or Altera Avalon) and other parts to be left "dangling" for use as external interfaces.
3. co_port eliminates compile errors that you will see if you leave streams, signals, etc. unconnected. For example, most (all?) of our examples have software test benches with producer/consumer processes. If you want to simply write a single process and generate hardware for it, the compiler will generate errors unless you terminate the streams, signals, etc. using co_port.
I hope this helps. By the way, we have had requests for more co_port related features allowing easier interface using Xilinx EDK (Platform Studio) and Altera SOPC Builder, and we are investigating possible enhancements in that area. User feedback is always welcome.
David Pellerin
David Pellerin
Impulse Accelerated Technologies, Inc.
Impulse Accelerated Technologies, Inc.
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