I have successed done the uClinux-filter example on XUP Virtex2Pro platform. However, only one strange point: the fpga_edge example can only run once on the platform:
when i power on the board, download the kernel images and application, i can see the result. After that, when i run the "img" again, the terminal displays: "Running ..." and the system freezed. I don't know why? And there's one thing i cann't understand: why are the Rst ports of the FSL_0 & FSL_1 connecting to the net_gnd, so weird! Can anyone explain this?
question about uClinux-filter example
Started by simux, Jul 23 2008 12:48 AM
2 replies to this topic
#1
Posted 23 July 2008 - 12:48 AM
#2
Posted 23 July 2008 - 02:48 PM
QUOTE (simux @ Jul 23 2008, 01:48 AM) <{POST_SNAPBACK}>
I have successed done the uClinux-filter example on XUP Virtex2Pro platform. However, only one strange point: the fpga_edge example can only run once on the platform:
when i power on the board, download the kernel images and application, i can see the result. After that, when i run the "img" again, the terminal displays: "Running ..." and the system freezed. I don't know why? And there's one thing i cann't understand: why are the Rst ports of the FSL_0 & FSL_1 connecting to the net_gnd, so weird! Can anyone explain this?
when i power on the board, download the kernel images and application, i can see the result. After that, when i run the "img" again, the terminal displays: "Running ..." and the system freezed. I don't know why? And there's one thing i cann't understand: why are the Rst ports of the FSL_0 & FSL_1 connecting to the net_gnd, so weird! Can anyone explain this?
Hi Simux,
The edge filter Impulse module is designed to be executed only once. That is why the FSL reset ports are connected to net_gnd, since resetting the FSLs without the hardware module won't make sence. The result you got is what is supposed to be. Hope this helps.
Regards,
Mei
#3
Posted 24 July 2008 - 02:16 AM
I got it! Thanks for the answer! I'll keep on digging the potential of ImpulseC!
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