Hi,
What is the best way to integrate a Xilinx HDL core with Impulse C? Is there another reference example besides SharedBRAM?
Thank you
cls
0
Integration of VHDL cores with Impulse C
Started by cls_egr, Mar 31 2008 08:29 PM
2 replies to this topic
#2
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Posted 02 April 2008 - 08:24 AM
What kind of core are you using? One from Xilinx Core Generator?
Use of the CO IMPLEMENTATION pragma is a possibility, described in detail in the Help documentation. Another method, which involves a little more work, is to use the Impulse C library mechanism. I'll look around for what documentation we have and get back to you soon.
Regards,
Ralph
Use of the CO IMPLEMENTATION pragma is a possibility, described in detail in the Help documentation. Another method, which involves a little more work, is to use the Impulse C library mechanism. I'll look around for what documentation we have and get back to you soon.
Regards,
Ralph
Ralph Bodenner
Impulse Accelerated Technologies, Inc.
Impulse Accelerated Technologies, Inc.
#3
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Posted 03 April 2008 - 02:02 PM
QUOTE (RalphBodenner @ Apr 2 2008, 11:24 AM) <{POST_SNAPBACK}>
What kind of core are you using? One from Xilinx Core Generator?
Use of the CO IMPLEMENTATION pragma is a possibility, described in detail in the Help documentation. Another method, which involves a little more work, is to use the Impulse C library mechanism. I'll look around for what documentation we have and get back to you soon.
Regards,
Ralph
Use of the CO IMPLEMENTATION pragma is a possibility, described in detail in the Help documentation. Another method, which involves a little more work, is to use the Impulse C library mechanism. I'll look around for what documentation we have and get back to you soon.
Regards,
Ralph
Hi,
Yes, I am trying to use some cores generated by Xilinx Core Generator for communication purposes.
Thank you for help. Please let me know about some documentation on the subject when available.
cls
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