LabVIEW integration Options

[jfm38]

Hello,

I'm evaluating CoDeveloper 3.6 as a coDSP builder for a larger LabVIEW FPGA 2009 project.
I'm facing to a data corruption when the codeveloper process is longer than a cycle to produce an output.
The LabVIEW documentation propose this code for HDL integration:

CODE

process( clk, reset )
  begin
    if( reset = '1' ) then
      result <= (others=>'0');
      enable_out <= '0';
    elsif rising_edge(clk) then
      result <= x + y; -- result and enable_out follow input by 1 clock cycle
      if( enable_clr = '1' ) then
        enable_out <= '0';
      elsif( enable_in = '1' ) then
        enable_out <= '1';
      end if;
    end if;
end process;

The codeveloper process is supposed to replace the x+y addition.

The description of enable_out is:
"The HDL code receives enable_in, executes, makes sure outputs are valid and held constant, and asserts enable_out. "

If I look on the wrapper code generated by codeveloper the enable chain controller is:

CODE

enable_chain_controller:
  process(clk, reset)
  begin
    if reset = '1' then
      enable_out <= '0';
    elsif rising_edge(clk) then
      if enable_in = '1' then
        enable_out <= '1';
      else
        enable_out <= '0';
      end if;
    end if;
  end process enable_chain_controller;

So enable_out is alway active when reset is not active.
I was expected to see someting relative to fifo ready there...

Any advice ?

Thanks

JF

[etrexel]

Hi,
Actually, given the code for enable_chain_controller above, enable_out should be just a clock delay of enable_in which could explain what you are seeing in regards to an error if the result takes more than one cycle. It would help to see the CoDeveloper project being used, please send a complete set of files to support@impulsec.com.

Best Regards,
Ed