Hi, I'm working around function primitives and I'm not sure what this message means:
limit=2 more transaction than ports
These's how my code looks:
void ord3(uint32 pix0, uint32 pix1, uint32 pix2, co_uint32 *ptrA) {
//Sort the three elements and return it in a vector form.
}
void Max_Func(co_stream raw0, co_stream raw1, co_stream raw2, co_stream Res){
co_uint32 ColC[3], ColB[3], ColA[3];
co_stream_read (raw0, pix0...)
co_stream_read (raw0, pix0...)
co_stream_read (raw0, pix0...)
ord3(pix0, pix1, pix2, ColC);
//Ordenamos por filas.
ord3(ColA[0], ColB[0], ColC[0], FilA);
ord3(ColA[1], ColB[1], ColC[1], FilB);
ord3(ColA[2], ColB[2], ColC[2], FilC);
co_stream_write (Res, &(FilC[2]),...)
}
When I use the stage master explorer to see my result It says :
rate limit factor: -... limit=2 more transaction than ports
I'm not sure what is limiting my rate, but in the source code diagram above, ColA and ColB are implement as variables and ColC as a MEM.
ColA[0] pass to be ColA_0
ColA[1] pass to be ColA_1
ColA[2] pass to be ColA_2
same to ColB, but not for ColC, it's still ColC[0] , what thas it meens??
How can I make ColC to ve separate variable or to run at 1 data/cycle?
I supose it's related with the use of pointers as parameter, but is there any other form of return multiple result from a function?
Pointer as parameter in function
Started by Juanma Gomez, Nov 18 2009 05:09 AM
1 reply to this topic
#1
Posted 18 November 2009 - 05:09 AM
#2
Posted 21 November 2009 - 05:40 PM
Hi,
Each primitive function will take up a physical port of the RAM created from an array. What is likely happening is that the three calls to ord3() are occurring simultaneously and the PSP (Xilinx and Altera PSPs do, Generic does not) you are using does not support dual-port RAMs. Please try placing a co_par_break(); between the calls to ord3() to see if breaking up the calls takes care of the error.
There are many things that will keep a design's pipeline from acheiving rate=1 including anything from calls to primitive functions with loops or indeterministic number of execution stages to multiple read/write to the same I/O or more acceses than ports to an array/RAM. Unless your application really needs the results in an array, i would suggest using scalar variables OR from the example above, it appears that not all the results are necessary such as FilC[0] and filC[2] so maybe a single result might be possible.
Best Regards,
Ed
QUOTE (Juanma Gomez @ Nov 18 2009, 06:09 AM) <{POST_SNAPBACK}>
Hi, I'm working around function primitives and I'm not sure what this message means:
limit=2 more transaction than ports
These's how my code looks:
void ord3(uint32 pix0, uint32 pix1, uint32 pix2, co_uint32 *ptrA) {
//Sort the three elements and return it in a vector form.
}
void Max_Func(co_stream raw0, co_stream raw1, co_stream raw2, co_stream Res){
co_uint32 ColC[3], ColB[3], ColA[3];
co_stream_read (raw0, pix0...)
co_stream_read (raw0, pix0...)
co_stream_read (raw0, pix0...)
ord3(pix0, pix1, pix2, ColC);
//Ordenamos por filas.
ord3(ColA[0], ColB[0], ColC[0], FilA);
ord3(ColA[1], ColB[1], ColC[1], FilB);
ord3(ColA[2], ColB[2], ColC[2], FilC);
co_stream_write (Res, &(FilC[2]),...)
}
When I use the stage master explorer to see my result It says :
rate limit factor: -... limit=2 more transaction than ports
limit=2 more transaction than ports
These's how my code looks:
void ord3(uint32 pix0, uint32 pix1, uint32 pix2, co_uint32 *ptrA) {
//Sort the three elements and return it in a vector form.
}
void Max_Func(co_stream raw0, co_stream raw1, co_stream raw2, co_stream Res){
co_uint32 ColC[3], ColB[3], ColA[3];
co_stream_read (raw0, pix0...)
co_stream_read (raw0, pix0...)
co_stream_read (raw0, pix0...)
ord3(pix0, pix1, pix2, ColC);
//Ordenamos por filas.
ord3(ColA[0], ColB[0], ColC[0], FilA);
ord3(ColA[1], ColB[1], ColC[1], FilB);
ord3(ColA[2], ColB[2], ColC[2], FilC);
co_stream_write (Res, &(FilC[2]),...)
}
When I use the stage master explorer to see my result It says :
rate limit factor: -... limit=2 more transaction than ports
Each primitive function will take up a physical port of the RAM created from an array. What is likely happening is that the three calls to ord3() are occurring simultaneously and the PSP (Xilinx and Altera PSPs do, Generic does not) you are using does not support dual-port RAMs. Please try placing a co_par_break(); between the calls to ord3() to see if breaking up the calls takes care of the error.
QUOTE
I'm not sure what is limiting my rate, but in the source code diagram above, ColA and ColB are implement as variables and ColC as a MEM.
ColA[0] pass to be ColA_0
ColA[1] pass to be ColA_1
ColA[2] pass to be ColA_2
same to ColB, but not for ColC, it's still ColC[0] , what thas it meens??
How can I make ColC to ve separate variable or to run at 1 data/cycle?
I supose it's related with the use of pointers as parameter, but is there any other form of return multiple result from a function?
ColA[0] pass to be ColA_0
ColA[1] pass to be ColA_1
ColA[2] pass to be ColA_2
same to ColB, but not for ColC, it's still ColC[0] , what thas it meens??
How can I make ColC to ve separate variable or to run at 1 data/cycle?
I supose it's related with the use of pointers as parameter, but is there any other form of return multiple result from a function?
There are many things that will keep a design's pipeline from acheiving rate=1 including anything from calls to primitive functions with loops or indeterministic number of execution stages to multiple read/write to the same I/O or more acceses than ports to an array/RAM. Unless your application really needs the results in an array, i would suggest using scalar variables OR from the example above, it appears that not all the results are necessary such as FilC[0] and filC[2] so maybe a single result might be possible.
Best Regards,
Ed
Ed Trexel
Impulse Accelerated Technologies, Inc.
Impulse Accelerated Technologies, Inc.
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